Wednesday, February 27, 2013

UVM Ports - Illustrated

There is always this question as to when to use uvm_analysis_port, uvm_analysis_export and uvm_analysis_import

The below diagram illustrates the correct use of all types of ports mentioned above through the 'Stacked UVCs' example.  This diagram illustrates the connection of BOTTOM UVC's monitors with the monitors of TOP UVCs. 

The requirement here is that any of the BOTTOM UVCs can be connected to any of the TOP UVCs. This means that we need to have a router component with uvm_analysis_exports since only exports can forward the data coming from the source 'port's of BOTTOM UVC's monitors. BOTTOM UVC's Monitor is the originator of the transacation and hence its required to have the uvm_analysis_port.

Monitors of the TOP UVCs are supposed to have the uvm_analysis_imports as they are the ultimate consumers of the transactions


Mark Glasser said...

There is no such thing as a uvm_analysis_import

Unknown said...

@Mark: it's implementation port wherein we implement analysis interface. But using the term Import wouldn't affect the very definition since both would mean consumption of data. Besides, it is tempting to use the term "Import" since we have port and export :)